COMPUTER DATA CONVERSION - BUSES AND THE FETCH EXECUTE CYCLE (SS2 NOTES)

 

Types of Computer Buses

1. Internal Bus: The internal bus (sometimes called the front-side bus, or FSB for short). The internal bus allows the processor to communicate with the system's central memory (the RAM).
2. Expansion Bus: The expansion bus (sometimes called the input/output bus) allows various motherboard components (USB, serial, and parallel ports, cards inserted in PCI connectors, hard drives, CD-ROM and CD-RW drives, etc.) to communicate with one another. However, it is mainly used to add new devices using what are called expansion slots connected to the input/output

3. Address bus: carries memory addresses from the processor to other components such as primary storage and input/output devices. The address bus is unidirectional, that is, data only move in one direction.
4. Data bus: carries the data between the processor and other components. The data bus is bidirectional, that is, data can move in two directions (to and fro simultaneously)
5. Control bus: carries control signals from the processor to other components. The control bus also carries the clock's pulses. The control bus is unidirectional, that is, data only move in one direction.

The Fetch-Execute Cycle

The fetch-execute cycle is the sequence the computer follows to transform data from one format to another.
The steps in the processing cycle are as follows:

1. Fetch the instruction

2. Decode the instruction

3. Get Data if needed

4. Execute the instruction
1. Fetch the next instruction: The program counter contains the address of the next instruction to be executed; the control unit goes to the address in the memory specified in the program counter, makes a copy of the contents and places the copy in the instruction register.
2. Decode the Instruction: To execute the instruction in the instruction register, the control unit has to determine what the instruction is.
3. Get Data If Needed: It may be that the instruction to be executed requires additional memory accesses to complete its task. If this is the case, the control unit must get the content of the memory location.
4. Execute the Instruction: Once an instruction has been decoded and any data fetched, the control unit is ready to execute the instruction. Execution involves sending signals to the arithmetic/logic unit to carry out the processing. When the execution is complete, the cycle begins again.

Simple Layout of Fetch Execute Cycle

Factors Affecting the Speed of Data Transfer

i. The amount of RAM: The larger the size of the computer RAM the faster the speed of data transfer and vice versa.
ii. The speed and generation of your CPU (the system clock): The speed of the computer is measured in Hertz (Hz) which is the number of tasks it can process per second. A computer with a specification 2GHz can process 2 billion tasks in one second. This implies that the faster the speed of the computer the faster the speed of data transfer.
iii. The size of the Register on your CPU: The speed of data transfer will be faster if the size of the register is also large and vice versa.
iv. The Bus width: The larger the width of a bus, the faster the number of bits that bus can transmit at once.
v. The Bus speed: High bus speed will favour faster speed of data transfers
vi. The amount of Cache memory: Cache memory is a temporary memory that holds frequently accessed data and instructions for faster and more efficient processing by the CPU. The higher the size of cache memory the faster the speed of data transfer. The downside of the cache memory is that it trades off capacity for speed.

Class Activities

1. Define data conversion

2. What are buses and explain any two (2) types of buses.

3. What is the speed of a bus with a width of 20 bits and a frequency of 160 MHz? Leave your answer in bits.

4. Describe the fetch execute cycle.

5. List four (4) factors affecting the speed of data transfer.